Skip Nav

For release: 06 Aug 2013

Agnisys, Inc. joins Accellera Systems Initiative

Lowell, MA, August 6, 2013.
Agnisys, Inc. today announced that it has joined the Accellera Systems Initiative. Agnisys is a provider of Register Generator for UVM Registers, IP-XACT, SystemRDL etc. and vendor-neutral Verification Management.

"I would like to welcome Agnisys as a new member," said Karen Pieper, chair of the Accellera Technical Committee. "We look forward to their active participation in standards working groups such as UVM, IP-XACT and SystemC. It is the commitment like theirs and that of our other members that keep standards moving forward and in pace with technical demand."

"Agnisys is a pioneer in creating Executable Document Specification (EDS), an area which has been under the radars for a long time and is now being recognized as a real challenge for both IP providers and SoC integrators. Our solution is simple and elegant and is widely used in semiconductor companies. These companies have benefited from automatic register verification leading to greater efficiency in the overall system development process. Joining Accellera will enable us to move the standards forward." said Anupam Bakshi, CEO, Agnisys, Inc.

He added, "It is important for thought leaders of the semiconductor and EDA industry to join Accellera and contribute to the development of standards and associated technology".

About Accellera Systems Initiative
Accellera Systems Initiative is an independent, not for profit organization dedicated to create, support, promote and advanced system-level design, modeling and verification standards for use by the worldwide electronics industry. The organization accelerates standard development and as part of its ongoing partnership with the IEEE, its standards are contributed to the IEEE Standards Association for formal standardization and ongoing change control.

About Agnisys Inc.:
Agnisys is a pioneer in delivering innovative products to make Design Verification team more efficient. Agnisys' product IDesignSpec is used for design specification. It enables users to create register models for UVM Registers, IP-XACT, SystemRDL, Synthesizable RTL etc. IVerifySpec enables users to create vendor neutral verification plans and enables deep analysis of large amount of simulation data. The company has been in the EDA tool industry for more than half a decade and its products have been trusted by hundreds of users in various IP and SoC companies.

Sandeep Vinayak
Marketing Manager

Agnisys Inc.
1255 Middlesex St. Unit I
Lowell, MA - 01851

For More Information, Contact:

Sandeep Vinayak
Agnisys Inc.
Phone: 855-837-4399
Email Sandeep Vinayak